I always wanted to write game of life but never had time. So this week I wrote it in python. Here you can find the code. Its probably not the easiest way or most strait forward but its the first version. I wrote it in half an hour maybe. I eventually spent quite some time …
From Harvard to von Neumann The CPU initially had Harvard architecture; with a RAM for data and a ROM for instructions. During the process of development I figured that both of these memories are more or less acting like local cache for the actual memory. Since each memory responds in 1 clock cycle. So if …
Some updates about processor! I just finished implementing 67 instructions (not tested all of them obviously!). And these instructions are not covered: floating point stuff Co-processor stuff Atomic Read-Modify-Write BREAK and WAIT Anything Cache related Trap instructions Also, Division is implemented using “/” and “mod”. These are not synthesize-able and also for division I’m not …
Dependability Measures NoCs are usually very poor at handling faults. If you mess up, say a destination address in a header flit, chances are that your entire network will go bye bye! Anyways, if you look into the problem faults on the data path in the router, you can easily divide it into 2 parts, …
Ver II: Credit Based Flow Control After the first chip was out, we decided that its time to improve the router and there were two major drawbacks in this version that we targeted: The handshaking flow-control was performing very poorly (basically the network was working at a third of its capacity) The switch arbiters could …
Some time ago I made (in VHDL) a rather stupid processor with very limited instruction set which I called pico-CPU. You can find it under pico_CPU folder in pico-CPU repository on github. The point back then was to make something for a course ( the course was called Digital Systems Modeling and Synthesis). Later on i started …